quickutilities – Intel is preparing to launch its new Nova Lake CPU lineup. And fresh leaks reveal key details about the Core Ultra 5 model. This chip will reportedly include 8 performance cores (P-cores), 16 efficiency cores (E-cores). And 4 low-power efficiency (LPE) cores, for a total of 28 CPU cores. Most notably, it will be the first to feature Intel’s Big Last Level Cache (bLLC) technology.
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According to reliable leakers OneRaichu and Haze2K1, the Ultra 5 445K and possibly the 435K will ship with bLLC. This feature is Intel’s answer to AMD’s 3D V-Cache, found in chips like the Ryzen 7 5800X3D. The extra cache layer is expected to boost gaming and multitasking performance. Making the Ultra 5 an appealing option for power users.
Although Intel is testing bLLC in mid-tier models, the higher-end Core Ultra 7 and Ultra 9 chips won’t include it—at least not initially. The top-tier Core Ultra 9 variant could feature as many as 52 cores. Combining 16 P-cores, 32 E-cores, and 4 LPE cores. However, only the Ultra 5 SKUs are confirmed to receive bLLC support.
The Core Ultra 5 245K might be the first model to launch, followed by the Ultra 7 and 9 variants in the next quarter. These new CPUs are poised to shake up the desktop processor market with their aggressive core counts and innovative cache design.
New Cores, TSMC N2 Node, and NPUs Highlight Nova Lake Innovation
Intel’s Nova Lake CPUs will debut with new P-core and E-core architectures. Codenamed Coyote Cove and Arctic Wolf respectively, these cores aim to deliver better performance and power efficiency across all workloads. The platform will also include a new Neural Processing Unit (NPU), further expanding Intel’s focus on AI acceleration.
In a shift from its traditional manufacturing process, Intel will produce the Nova Lake CPU tile on TSMC’s advanced N2 node. This marks a significant departure from its own 18A process, indicating a strategic partnership to enhance performance and yield. Other chip components, such as the GPU tile, memory controller (IMC), and input/output die (IOD), will still rely on older Intel and TSMC nodes.
By using bLLC in the Ultra 5 series. Intel appears to be following AMD’s strategy of introducing new cache technology in limited SKUs before expanding it further. The selective rollout allows Intel to test bLLC’s real-world impact, especially for gaming and latency-sensitive applications.
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Intel’s decision to prioritize bLLC in the Ultra 5 tier may also reflect an intent to disrupt AMD’s mid-range dominance. Gamers and enthusiasts looking for affordable high-performance CPUs may find Nova Lake’s new offerings compelling. Especially if early benchmarks confirm the expected performance gains.
As Intel moves closer to a full reveal, Nova Lake could represent one of the company’s most ambitious architectural leaps in recent years. Between cutting-edge manufacturing, revamped core architectures, and experimental cache strategies, this generation may reshape Intel’s position in the competitive CPU market.
